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14 June 2011 |
15 June 2011 |
16 June 2011 |
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Workshop A:
BTC (Bottom Termination Components) Assembly – Material, Process & Reliability
Dr. Jennie Hwang, H-Technologies Group, USA |
Workshop B:
Package-on-Package (PoP) Assembly – Material, Process and Reliability
Dr. Jennie Hwang, H-Technologies Group, USA
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Workshop C:
BGA/CSP/WLP Reliability in Electronic Packaging & Assembly
Dr. Jennie Hwang, H-Technologies Group, USA |
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Workshop D:
Implementing Advanced SMT Technologies: Components, Materials & Equipment
Joe Belmonte, ITM Consulting, USA |
Workshop E:
Understanding and Implementing Best Practices in SMT Assembly
Joe Belmonte, ITM Consulting, USA
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Workshop F:
SMT Cleaning
Joe Belmonte, ITM Consulting, USA |
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Workshop G:
Integrated Circuit Packaging and Assembly
Dr. Thomas Dory, Arizona State University, USA
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Workshop H:
Semiconductor Manufacturing at 32nm and Below
Dr. Thomas Dory, Arizona State University, USA
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Workshop H:
Semiconductor Manufacturing at 32nm and Below
Dr. Thomas Dory, Arizona State University, USA
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Workshop I:
Counterfeit Electronics – Risks and Mitigation
Bhanu Sood, University of Maryland’s Center for Advanced Life Cycle Engineering (CALCE), USA
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Workshop J:
Best Practices of Controlling Moisture in Printed Circuit Boards
Bhanu Sood, University of Maryland’s Center for Advanced Life Cycle Engineering (CALCE), USA
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Workshop K:
Halogen-free Printed Circuit Board Materials
Bhanu Sood, University of Maryland’s Center for Advanced Life Cycle Engineering (CALCE), USA
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Workshop L:
Design of Experiments (DOE) for Process and Quality Optimization
Bong Kok Liang, Blue Ocean Data Solutions, Malaysia
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Workshop L:
Design of Experiments (DOE) for Process and Quality Optimization
Bong Kok Liang, Blue Ocean Data Solutions, Malaysia
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Workshop M:
Practical Process Failure Mode and Effect Analysis (PFMEA)
Bong Kok Liang, Blue Ocean Data Solutions, Malaysia
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